A thin-film chip resistor of this kind is disclosed in JP-A 2001-35702 for example, and has a construction as shown in FIG. 1 of the present application. Specifically, the chip resistor includes a chip substrate 1 made of a heat resistant insulation material such as ceramic, which has a surface provided with a thin-film resistive element 2 formed by a thin-film process such as spattering. The resistive element 2 is patterned to have two wide ends 2a, 2b sandwiching a narrow intermediate portion 2c. 
The thin-film chip resistor can be of a type shown in FIG. 2-a or a type shown in FIG. 2-b. Specifically, in the type shown in FIG. 2-a, the resistive element 2 has its two wide ends 2a, 2b formed with surface electrodes 3, 4 respectively. The electrodes 3, 4 have their surfaces formed with connection bumps 5, 6 respectively, and the resistive element 2 is covered with a cover coat 7. On the other hand, in the type shown in FIG. 2-b, the resistive element 2 has its two wide ends 2a, 2b formed with surface electrodes 8, 9, the chip substrate 1 has its two end surfaces formed with connection terminal electrodes 10, 11 respectively, and the resistive element 2 is covered with a cover coat 12.
Generally, these conventional thin-film chip resistors are made in the following method. Specifically:    i) First, as shown in FIG. 3 and FIG. 4, a material plate A is prepared which has a surface provided with lengthwise breaking grooves A1 and crosswise breaking grooves A2 for breakage into a plurality of chip substrates 1.    ii) Next, the material plate A is placed into a sealed container, and a thin-film process is performed to the material surface by means of spattering or vacuum deposition, using a resistive element material as a target. In this process, a thin film of the resistive element material B is formed as shown in FIG. 5, covering the entire surface of the material plate A.    iii) Next, as shown in FIG. 6, a negative resist film C is formed to cover the entire surface of the resistive element material thin film B. On this resist film C, a photo mask D is placed which has stencil patterns D1 (photographically transparent openings) each for shaping a resistive element 2 on one of the chip substrates 1. The pattern is printed through a photochemical exposure process.    iv) Next, a developing process is performed, in which the resist film C is soaked into a developing solution. In this process, as shown in FIG. 7, the resist film C is removed except for the portion patterned into the shape of resistive element 2 on each chip substrate 1.    v) Next, an etching process is performed in an etchant which is capable of removing the thin film of resistive element material B. In this process, as shown in FIG. 8, portions of the resistive element material B which are not covered with the resist film C are dissolved and thereby removed, leaving beneath the resist film C resistive elements 2 which are patterned into a predetermined shape.    vi) Next, as shown in FIG. 9, the resist film C is removed by dry ashing or etching in solution, and then the material plate A is cut along the lengthwise breaking grooves A1 and the crosswise breaking grooves A2 into a plurality of chip substrates 1.
As described, in the conventional method, the lengthwise breaking grooves A1 and the crosswise breaking grooves A2 are formed in advance, then a resistive element material B is formed by spattering or vacuum deposition on the entire surface of the material plate A, the resistive element material B is then masked with a resist film C for a photo etching process to form a predetermined pattern of resistive elements 2, and then the material plate A is cut along each of the breaking grooves A1, A2, into a plurality of chip substrates 1.
According to the conventional method, however, during the formation of resistive element material B on the surface of the material plate A by means of spattering or vacuum deposition, the spattering or the vacuum deposition process unavoidably forms a film of the resistive element material B in the breaking grooves A1, A2 which are already made in the surface of the material plate A. Thus, it is necessary in the etching process that follows, to remove the deposit of resistive element material B completely from the breaking grooves A1, A2 as part of the unnecessary portions. If this etching process leaves the resistive element material B in the breaking grooves A1, A2, it becomes difficult to cut the material plate A into each individual chip substrate 1. Moreover, the residue causes another problem in a step which must be done before the cutting. Specifically, there is a step called trimming adjustment, in which two electrical probes are placed onto respective ends of the resistive element 2 and trimming is made to the element while measuring a resistance value. If the resistive element material B is left in the breaking grooves A1, A2, it becomes impossible to obtain an accurate resistance value, which not only decreases accuracy of the trimming adjustment but also results in poor yield of the product.
Another problem is that even after the material plate A has been cut along the breaking grooves A1, A2, the portions which used to be the breaking grooves A1, A2 still carry the resistive element material. After forming the connection terminal electrodes 10, 11, when forming a layer of plating as shown in FIG. 2-b, on surfaces of these connection terminal electrodes 10, 11 for improved soldering, the residue of resistive element material is a cause of poor plating.
The resistive element material B formed in a thin-film process such as spattering grows deep into the breaking grooves A1, A2, and the film has a much greater thickness in these regions. Therefore, in order to remove the resistive element material B completely from the breaking grooves A1, A2 by etching, a long time must be provided for the etching.
Spending a long time for the etching causes a number of problems: it increases cost of manufacturing. It increases a risk that the etching process will erode the underside of the resist film C and thereby destroy the predetermined pattern of the resistive element 2. It also increases a risk that the resist film C will also be eroded by the etchant, and pin holes will be made in the resistive element 2, causing the resistance value becoming far away from an acceptable range, and resulting in increased rate of defective products.